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System for reducing main memory access time by bypassing address expansion device when high-order address portions are unaltered
System for reducing main memory access time by bypassing address expansion device when high-order address portions are unaltered
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机译:当高阶地址部分不变时,通过绕过地址扩展设备来减少主存储器访问时间的系统
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摘要
Proceeding from a known method and apparatus for expanding the address for accessing a main memory by a central controller of a switching system, a determination is made in a comparator as to whether the address information of the high-order address lines or address registers of the expansion device with respect to a preceding main memory access changes in comparison to the current main memory access. When coincidence is present, the high-order portion of the main memory address in the preceding main memory access stored in an address register is immediately used for the formation of the overall main memory address.
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