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System for reducing main memory access time by bypassing address expansion device when high-order address portions are unaltered

机译:当高阶地址部分不变时,通过绕过地址扩展设备来减少主存储器访问时间的系统

摘要

Proceeding from a known method and apparatus for expanding the address for accessing a main memory by a central controller of a switching system, a determination is made in a comparator as to whether the address information of the high-order address lines or address registers of the expansion device with respect to a preceding main memory access changes in comparison to the current main memory access. When coincidence is present, the high-order portion of the main memory address in the preceding main memory access stored in an address register is immediately used for the formation of the overall main memory address.
机译:从用于由交换系统的中央控制器扩展用于访问主存储器的地址的已知方法和设备出发,在比较器中确定是否高阶地址线的地址信息或地址的地址寄存器。扩展设备相对于先前的主存储器访问而言与当前的主存储器访问相比有所变化。当存在重合时,存储在地址寄存器中的先前主存储器访问中的主存储器地址的高位部分立即用于形成整个主存储器地址。

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