INTEGRATED CIRCUIT APPARATUS ADAPTED TO REPEAT DCT/IDCT COMPUTATION USING SINGLE MULTIPLIER/ACCUMULATOR AND SINGLE RANDOM ACCESS MEMORY

摘要

PURPOSE: To simplify the circuit constitution by transferring data to a random access memory to store it in a row or a column and transferring data in a row or a column to an input buffer and a first arithmetic logic unit. CONSTITUTION: The result of DCT(discrete cosine transformation) processing for a row 23 is stored in a row 24 of an interleave memory 60, and the same procedure is successively executed for other rows of a block 22, and a RAM 60 includes the result of the first dimension (namely, a first path) for the block 22. With respect to the second dimension (namely, a second path) of DCT, execution of DCT for columns of the RAM 60, namely, execution of DCT for the temporary result is included. Second DCT operation is executed for this data, and the result is outputted from a device 10 and is encoded thereafter. A processor 20 performs the operation at a speed twice as high as the speed at which input data is sent to the device 10 from the block 22 or other blocks. Thus, the circuit constitution is simplified.