首页> 外国专利> PARITY MONITORING SYSTEM APPLIED TO DIGITAL TRANSMITTER PUT IN SCRAMBLING OPERATION

PARITY MONITORING SYSTEM APPLIED TO DIGITAL TRANSMITTER PUT IN SCRAMBLING OPERATION

机译:奇偶校验监控系统应用于数字发射机在加扰操作中的应用

摘要

PURPOSE:To monitor accurately the quality of transmission by a parity check on a scrambled input signal by ORing exclusively the parity count result of the input signal and that of a scramble signal. CONSTITUTION:A scramble period is denoted as TS and a parity check period is represented as TP; and scramble periods are represented as TP1-TPN from the initial time slot in order, and this section is regarded as the parity check section. The parity count result of the input signal in a section TPi (i=1-N) is denoted as Pi and that of the scramble signal is represented as PSi, which is calculated previously and stored in a memory M. Counted values TPi are read out of the memory M successively through a read circuit R corresponding to the periods TPi while synchronizing with a timing signal C and EXORed with a counted value Pi to output the parity check bit R'i of the scrambled signal. Consequently, the quality of transmission is monitored accurately regardless of the length and contents of the scramble signal.
机译:目的:通过对加扰后的输入信号进行奇偶校验检查来精确监视传输质量,方法是对输入信号和加扰信号的奇偶校验结果进行异或运算。组成:加扰周期表示为TS,奇偶校验周期表示为TP;从初始时隙开始,加扰周期和加扰周期被依次表示为TP1-TPN,并且该部分被视为奇偶校验部分。将在部分TPi(i = 1-N)中输入信号的奇偶校验结果表示为Pi,并将加扰信号的奇偶校验结果表示为PSi,该结果预先计算并存储在存储器M中。读取计数值TPi通过与周期TPi相对应的读电路R依次从存储器M中取出存储器M,同时与定时信号C同步并与计数值Pi进行异或运算,以输出加扰信号的奇偶校验位R'i。因此,无论加扰信号的长度和内容如何,​​都可以准确地监视传输质量。

著录项

  • 公开/公告号JPH0315863B2

    专利类型

  • 公开/公告日1991-03-04

    原文格式PDF

  • 申请/专利权人 NIPPON ELECTRIC CO;

    申请/专利号JP19830079045

  • 发明设计人 HAMADA TATSUYOSHI;

    申请日1983-05-06

  • 分类号H04L1/00;H04L25/03;

  • 国家 JP

  • 入库时间 2022-08-22 06:03:48

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号