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Circuit arrangement for the acquisition of chirp-modulated signals, especially for the acquisition of chirp-modulated ultrasonic signals

机译:用于采集线性调频信号的电路装置,尤其是用于线性调频超声信号的采集

摘要

Circuitry for detecting chirped signals having at least two counters, an oscillator and a chain of gates and clocked shift registers. This includes a digital frequency discriminator, through which the Fre the comments received chirped signals quenzänderungen be captured and digitized, the digital output signals of the frequency discriminator a sequential pulse detector consists of a chain of OR gates (75) and from the oscillator (36) (by counter 40) clocked shift registers (70) are supplied, in which these signals aufeinan temporally summed derfolgend, so that the digital frequency discriminator (2) and the sequential pulse detector (70, 75) form a matched to the chirped signals filter, after reaching a predetermined threshold value of at least one of a plurality of Schwellwertschaltun gen (80) to a priority decoder (90), an output signal is outputted and the priority decoder (90), the frequency and timing of the comments received chirped signal is determined, whereby this predetermined in a Frequen z whereupon the output signal of the priority decoder (90) to a display signal is outputted to a memory or is determined and evaluated area correlatively.
机译:用于检测线性调频信号的电路,具有至少两个计数器,一个振荡器以及一系列门和时钟移位寄存器。其中包括一个数字鉴频器,通过该鉴频器,可以将接收到的comments声信号quenzänderungen的注释捕获并数字化,该鉴频器的数字输出信号由一个或门链(75)和来自振荡器(36)的顺序脉冲检测器组成。 (通过计数器40)提供时钟移位寄存器(70),其中这些信号在时间上被总和derfolgend,使得数字鉴频器(2)和顺序脉冲检测器(70、75)与the信号形成匹配。在达到优先级解码器(90)的多个Schwellwertschaltun gen(80)中的至少一个的预定阈值之后,对输出信号进行滤波,并输出优先级解码器(90),接收到的评论的频率和定时信号被确定,由此在Frequen z中的预定值,由此优先级解码器(90)对显示信号的输出信号被输出到存储器或确定d并相关地评估面积。

著录项

  • 公开/公告号EP0286623A3

    专利类型

  • 公开/公告日1990-11-28

    原文格式PDF

  • 申请/专利权人 SONAIR MESSGERAETE GMBH;

    申请/专利号EP19880890059

  • 发明设计人 METCHEV ALEXANDER DR.;

    申请日1988-03-17

  • 分类号G01S7/52;G01S15/10;H03B23/00;

  • 国家 EP

  • 入库时间 2022-08-22 05:54:21

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