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Method and circuitry for supplying one of two clock signals to a clock line in dependence on the level of one of both clock signals

机译:用于根据两个时钟信号之一的电平向时钟线提供两个时钟信号之一的方法和电路

摘要

in a oberflu00e4chenwellenfiltertechnik based taktregenerator reclaimed and pegelschwankungen aufu00adweisenden taktsignale (t1) or, for example, in a network access control of an annular internally generated approximately digital taktsignale (t2) in the head the level of the regenerated taktsignale (t1) to a taktu00adleitung controlled.the reform is based on early detection of pegelschwankungen in the way that the current to taktleitung durchgeschalteten (t1, t2) taktsignale are switched off and after a short delay, the other clock signal (t1, t2, each synchronized to taktleiu00adtung bu hold.
机译:在基于oberfl u00e4chenwellenfiltertechnik的taktregenerator中进行回收和pegelschwankungen auf u00adweisenden taktsignale(t1),例如在环形内部内部生成的近似数字taktsignale(t2)的网络访问控制中,再生taktsignale(t1)的高度该改革基于对pegelschwankungen的早期检测,其方式是:关闭流向taktleitung durchgeschalteten(t1,t2)taktsignale的电流,并在短暂延迟后,另一个时钟信号(t1,t2,每个同步到taktlei u00adtung bu hold。

著录项

  • 公开/公告号EP0269812B1

    专利类型

  • 公开/公告日1991-02-06

    原文格式PDF

  • 申请/专利权人 SIEMENS AKTIENGESELLSCHAFT;

    申请/专利号EP19870114520

  • 发明设计人 CLASEN PETER-MICHAEL DIPL.-ING.;

    申请日1987-10-05

  • 分类号G06F1/04;H03K5/19;H04L7/02;

  • 国家 EP

  • 入库时间 2022-08-22 05:53:54

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