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DECODER OF INFORMATION OF SECONDRY RADAR ANSER SIGNAL

机译:二次雷达响应信号信息解码器

摘要

decoder u0438u043du0444u043eu04401 '1u0430u0446u0438u0438 response signals of secondary u0440u0430u0434u0438u043eu043bu043eu043au0430u0442u043e -.ra containing switch channels at the two entrances which filed information and u0430u0437u0438u043cu0443u0442u0430u043bu044cu043du044bu0439 u0434u0435u0448u0438u0444u0440u0430u0442u043eu0440u044b information signal receiver, the first and second channels. the first and u043au043eu0442u043eu0440u044cu0442u0445 u043fu043eu0434u043au043bu0439u0447u0435u043du044b respectively to two other u0432u0445u043eu0434u0430u043c switch channels and to u0432u0445u043eu0434u0430u043c block u043eu0431u043du0430u0440u0443u0436u0435u043du0438u00a0 on u043bu043eu0436u0435u043du043du044bu0445 positionsa second exit u0434u0435u0448u0438u0444u0440u0430u0442u043eu0440u043eu0432 information of first and second channels are connected to the inputs of u043eu0431u044au0435u0434u0438u043du0435u043du0438u00a0 prohibition.o t l and u0447u0430u044eu0449u0438u0439u0441u00a0 order ', with a view to u043fu043eu0432u044bu0448u0435u043du0438u00a0 resolving ability and immunity as u0434u0435u043au043eu0434u0438u0440u043eu0432u0430u043du0438u00a0, introduced the u0441u0440u0430u0432u043du0435u043du0438u00a0 u0430u0437u0438u043cu0443u0442u043eu0432 first and second u043au0430u043du0430u043bu043e in a block of u0441u043eu0432u043fu0430u0434u0435u043du0438u00a0 and two elements or, in some place which is served with an additional service signal receiver, and the other is connected with the outputs switch channelsother outputs which are connected to the u0432u0445u043eu0434u0430u043c block u0441u0440u0430u0432u043du0435u043du0438u00a0 u0430u0437u0438u043cu0443u0442u043eu0432 first and second channels out of which block is connected with the front u0441u043eu0432u043fu0430u0434u0435u043du0438u00a0 "ban" blo this u043eu0431u044au0435u0434u0438u043du0435u043du0438u00a0 prohibition building elements or are connected to the inputs of u0434u0435u0448u0438u0444u0440u0430u0442u043eu0440u043eu0432 information and exit block u043eu0431u043du0430u0440u0443u0436u0435u043du0438u00a0 superimposed positions u0441u043eu0435u0434u0438u043d and with the second u0441u043eu0432u043fu0430u0434u0435u043du0438u00a0 entrance block.on the u20acu0441u043b05u043e: & & amp; pm ^ ^ o ^ invention u043eu0442u043du043eu0441u0438u0442u0441u00a0 to radar and can u0438u0441u043fu043eu043bu044cu0437u043eu0432u0430u0442u044cu0441u00a0 u0434u043bu00a0 u043cu043eu043du043eu0438u043cu043fu0443u043bu044cu0441u043du043eu0433u043e receive signals from them u043fu0443u043bu044cu0441u043du043e - temporary u043au043eu0434u0438u0440u043eu0432u0430u043du0438u0435u043c.u043eu0434u0438u043d from u0432u0435u0441u0442u043du044bu0445 "u0434u0435u0448u0438u0444u0440u0430u0442u043eu0440u043eu0432 information response signal contains u0434u0432u0443u0445u043au0430u043du0430u043bu044cu043du044bu0439 decoder, communication channels, the device u043eu0431u043du0430u0440u0443u0436u0435u043du0438u00a0 superimposed positions and u0443u0441u0442u0440u043eu0439u0441u0442 in u043eu0431u044au0435u0434u0438u043du0435u043du0438u00a0 ban.however, a decoder has low immunity.known u0434u0435u0448u0438u0444u0440u0430u0442u043eu0440u043eu0432 closest to the u00a0u0432u043bu00a0u0435u0442u0441u00a0 decoder information secondary radar response signals containing the commutator. u043du0430u043bu043eu0432, two entrance which filed information 'and u0430u0437u0438u043cu0443u0442u0430u043bu044cu043du044bu0439 u0434u0435u0448u0438u0444u0440u0430u0442u043eu0440u044b information signal receiver, the first and second channels.the first area 'which are connected respectively to the u04341 ^ mind other u0432u0445u043eu0434u0430u043c switch channels and to u0432u0445u043eu0434u0430u043c block u043eu0431u043du0430u0440u0443u0436u0435u043du0438u00a0 was -
机译:解码器 u0438 u043d u0444 u043e u04401'1 u0430 u0446 u0438 u0438次级 u0440 u0430 u04330 u0434 u0438 u043e u043b u043e u043a u0430 u0442 u043e -.ra在两个入口处包含切换通道,用于提交信息和 u0430 u0437 u0438 u043c u0443 u0442 u0430 u043b u044c u043d u044b u0439 u0434 u0435 u0448 u0438 u0444 u0440 u0430 u04c u0442 u043e u0440 u044b信息信号接收器,第一和第二通道。第一个和 u043a u043e u0442 u043e u0440 u044c u0442 u0445 u043f u043e u0434 u043a u043b u0439 u0447 u0435 u043d u044b分别与另外两个 u0432 u0445 u043e u0434 u0430 u043c切换通道并切换到 u043b u043e上的 u0432 u0445 u043e u0434 u0430 u043c块 u043e u0431 u043d u0430 u0440 u0443 u0436 u0435 u0435 u043d u043d u0438 u00a0 u0436 u0435 u043d u043d u044b u0445位置第二个出口 u0434 u0435 u0448 u0438 u0444 u0440 u0430 u0442 u043e u0440 u043e u0432的信息已连接至第一和第二通道的输入 u043e u0431 u044a u0435 u0434 u0438 u043d u0435 u043d u0438 u00a0禁止.otl和 u0447 u0430 u044e u0449 u0438 u0439 u0441 u00a0订单',以查看 u043f u043e u0432 u044b u0448 u0435 u043d u0438 u00a0的解析能力和免疫力为 u0434 u0435 u043a u043e u043e u0434 u0438 u0440 u043e u043e u0432 u0430 u043d u0438 u00a0 u0441 u0440 u0430 u0432 u043d u0435 u043d u0438 u00a0 u0430 u0437 u0438 u043c u0443 u0442 u043e u0432首先和在 u0441 u043e u0432 u043f u0430 u0434 u0435 u043d u043d u0438 u00a0块中的第二个 u043a u0430 u043d u0430 u043b u043e和两个元素,或者,在某个位置配有额外的服务信号接收器,另一个与输出开关通道连接,其他输出与 u0432 u0445 u043e u0434 u0430 u043c模块 u0441 u0440 u0430 u0432 u043d u0435 u043d u0438 u00a0 u0430 u0437 u0438 u043c u0443 u0442 u043e u0432其中的第一个和第二个通道与前面的 u0441 u043e u0432 u043f u0430 u0434 u0435 u043d u0438 u00a0 “ ban ”禁止此 u043e u0431 u044a u0435 u0434 u0438 u043d u0435 u043d u0438 u00a0禁止构建元素或连接到 u0434 u0435 u0448 u0438 u0444的输入 u0440 u0430 u0442 u043e u0440 u043e u0432信息和退出块 u043e u0431 u043d u0430 u0440 u0443 u0436 u0435 u043d u0438 u00a0叠加位置 u0441 u043e u0435 u043 u0438 u043d和第二个 u0441 u04在

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