首页> 外国专利> devices for implementing a pcm encoded input signal in a pulsdichtemoduliertes output and application of this decodierers in a digital analog converter

devices for implementing a pcm encoded input signal in a pulsdichtemoduliertes output and application of this decodierers in a digital analog converter

机译:用于在脉冲二分调制器输出中实现pcm编码输入信号的设备,以及该分频器在数字模拟转换器中的应用

摘要

A decoder for converting a linear p.c.m. input at a pulse density modulated (p.d.m.) sampling rate to a sigma-delta type p.d.m. binary stream, which can be demodulated by a simple R.C. filter, or otherwise, provides an analogue output as in a digital-to-analogue converter if required. The decoder basically comprises first and second recursive filters (F', G'), the output of the first (F') being applied to the input of the second (G'), which in turn outputs to digital comparator (13). Depending on the output of the comparator, a signal Q' has one of two values and is applied wholly or proportionally to the first recursive filter (F') and proportionally (as P') to the second recursive filter (G'). Each recursive filter comprises a respective multiplier (21, 22) and a respective storage register (11, 12) clocked at the same clock rate (fc), and with an input comprised by a respective adder (9, 10). Other circuit configurations (Figs. 3 to 7) conforming to the same simulation formulae as Fig. 8 are described. IMAGE
机译:用于转换线性p.c.m的解码器以脉冲密度调制(p.d.m.)采样率输入到sigma-delta型p.d.m.二进制流,可以通过简单的R.C.如果需要,滤波器可以提供模拟输出,如在数模转换器中一样。解码器基本上包括第一和第二递归滤波器(F',G'),第一和第二递归滤波器(F')的输出被加到第二(G')的输入,后者又被输出到数字比较器(13)。取决于比较器的输出,信号Q'具有两个值之一,并且全部或成比例地施加到第一递归滤波器(F'),并且成比例地(作为P')施加到第二递归滤波器(G')。每个递归滤波器包括以相同的时钟速率(fc)计时的相应的乘法器(21、22)和相应的存储寄存器(11、12),并且输入包括相应的加法器(9、10)。描述了符合与图8相同的仿真公式的其他电路配置(图3至图7)。 <图像>

著录项

  • 公开/公告号DE3237552C2

    专利类型

  • 公开/公告日1991-04-25

    原文格式PDF

  • 申请/专利权人 STC PLC LONDON GB;

    申请/专利号DE19823237552

  • 申请日1982-10-09

  • 分类号H03M7/00;H03K11/00;

  • 国家 DE

  • 入库时间 2022-08-22 05:50:11

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