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Electronic multiplier-divider circuit - contains switchable adder-subtractor circuits and output stage requiring no potential storage series circuit

机译:电子倍增器-除法器电路-包含可切换的加减法器电路以及无需电位存储串联电路的输出级

摘要

The electronic multiplier-divider circuit consists of a number of adder-subtractor circuits which are switchable between addition and substraction. The number of circuits (1) can be held sufficiently low by using shift registers extended in a suitable direction and by restricting the multiplicand and divisor to fewer than eight digits. The output stage (N) contains two shift registers with opposed shift direction or only one shift register for both directions. No additional potential storage series circuit is required in the output stage. ADVANTAGE - Eliminates need for potential storage series circuit.
机译:电子乘法器-除法器电路由多个加法器-减法器电路组成,可在加法和减法之间切换。通过使用在适当方向上扩展的移位寄存器并通过将被乘数和除数限制为少于八位数,可以将电路的数量(1)保持足够低。输出级(N)包含两个移位寄存器,它们的移位方向相反,或者在两个方向上只有一个移位寄存器。在输出级中不需要额外的电位存储串联电路。优势-无需潜在的存储串联电路。

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