The limiter circuit of a deviation of the logic voltages, and logic circuit comprising such a limiter excursion

摘要

The invention relates to a limiter circuit of a deviation of the logic voltages for the logic circuits, known as dcfl a very low consumption and ultra fast. / p & & p & the limiter circuit comprises, mounted in series between a voltage source v and ground, a resistor 21 and a field effect transistor 22, which is normally blocked. The source 10 of the transistor 22 is in the mass. The gate 11 is reunie to the drain 12 which constitutes the output of the limiter circuit. The output voltage v, which constitutes the high logic level v is lower or the same has three times the threshold voltage v of the transistor 22 if the current i which passes through the charge 21 is inferior or equal to twice the product of the transconductance g of the transistor by its threshold voltage v. / p & & p & application to circuits integrated dcfl logic, in particular on gaas and compounds iii -.