Vector processing system utilizing firm ware control to prevent delays during processing operations

摘要

A vector processing system prevents delays in reading microinstructions from a control memory during processing operations. The vector processing system permits a second microinstruction to be read from the control memory before processing is completed on a first microinstruction. Thus, delays caused by waiting for the processing to be completed on the first microinstruction before loading the next microinstruction are prevented. The disclosed vector processing system incorporates a start command hold flag that holds the start command from a second microinstruction until the processing initiated by the first microinstruction is completed.