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Autonomous N-modular redundant fault tolerant clock system

机译:自主N模冗余容错时钟系统

摘要

A fault tolerant clock system in which synchronization of the clocks continuing to operate after a fault occurs is maintained within a skew limit. The clock system includes a plurality of clock channels (10), each including a clock unit (12) and an isolation port (14). A local clock signal produced by a crystal oscillator (16) is enabled to provide a clock channel output signal while a counter (24) in the clock unit accumulates a predetermined number of local clock pulses. After the predetermined number is reached, the counter disables the clock channel output signal and produces a sync pulse, which is input to a voter block (48). In response to the second sync pulse to be received from each of the clock channels, each voter block produces a load pulse signal that is input to the isolation port of that clock channel. Corresponding isolated load signals are produced by the isolation port and provided to voter blocks (72) in each of the clock units. The voter blocks respond to the second isolated load signal to be received, producing a load enable signal that is input to the counter. Upon receipt of the load enable signal, the counter resumes counting and again enables the clock channel output signal, in synchronization with the other clock channel output signals. Up to N simultaneous faults may be sustained in the clock system, without loss of synchronization in the clock channels that continue to operate properly, so long as 2N+1 clock channels are provided.
机译:容错时钟系统,其中在发生故障后时钟的同步继续保持在偏斜限制内。该时钟系统包括多个时钟通道(10),每个时钟通道包括时钟单元(12)和隔离端口(14)。使能由晶体振荡器(16)产生的本地时钟信号以提供时钟通道输出信号,同时时钟单元中的计数器(24)累积预定数量的本地时钟脉冲。在达到预定数目之后,计数器禁用时钟通道输出信号并产生同步脉冲,该同步脉冲被输入到表决器模块(48)。响应于将从每个时钟通道接收的第二同步脉冲,每个表决器模块产生一个负载脉冲信号,该信号被输入到该时钟通道的隔离端口。隔离端口产生相应的隔离负载信号,并将其提供给每个时钟单元中的表决器模块(72)。表决器块响应要接收的第二隔离负载信号,产生一个负载使能信号,该信号被输入到计数器。接收到负载使能信号后,计数器将恢复计数,并与其他时钟通道输出信号同步再次使能时钟通道输出信号。只要提供2N + 1个时钟通道,时钟系统中最多可以同时发生N个故障,而不会继续保持正常运行的时钟通道的同步性。

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