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Method and apparatus for indicating when the total in a counter reaches a given number

机译:用于指示计数器中的总数何时达到给定数字的方法和设备

摘要

In order to compare the total reached by a counter counting pulses from a source with a given number, the more significant digits from the counter are compared with the corresponding digits of the given number. The comparator produces an output when the groups of more significant digits are equal. An adjusted output taking account of the less significant digits of the given number is obtained by delaying the output by a time period equal to that required for the number of pulses from the source to be incremented by the number represented by the less significant digits of the given number. The time delay is provided by a multi-stage shift register using the pulses from the source as shift pulses, the output from the comparator being applied to the first stage and the adjusted output being derived from a stage selected according to the less significant digits of the given number.
机译:为了比较计数器对来自具有给定数字的源的脉冲进行计数所达到的总数,将来自计数器的更高有效数字与给定数字的相应数字进行比较。当较高有效位数的组相等时,比较器产生输出。通过将输出延迟一定的时间段来获得经过调整的输出,该输出考虑了给定数字的低位数字,该时间段等于源脉冲的数量增加了由源的低位数字所表示的数字所需的时间。给定的数字。时间延迟由多级移位寄存器提供,使用来自源的脉冲作为移位脉冲,比较器的输出应用于第一级,而调整后的输出则是根据根据数字的较低有效位选择的一级得出的。给定的数字。

著录项

  • 公开/公告号US5060244A

    专利类型

  • 公开/公告日1991-10-22

    原文格式PDF

  • 申请/专利权人 TEXAS INSTRUMENTS INCORPORATED;

    申请/专利号US19890387266

  • 发明设计人 IAIN C. ROBERTSON;

    申请日1989-07-28

  • 分类号H03K21/10;

  • 国家 US

  • 入库时间 2022-08-22 05:45:41

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