ARITHMETIC CIRCUIT, AND ADAPTIVE FILTER AND ECHO CANCELER USING SAME

摘要

PURPOSE:To reduce the power consumption of an LSI for the echo canceler, etc., realized by the adaptive filter by lowering the operation frequency while securing necessary processing ability per unit time. CONSTITUTION:In a digital signal processing unit for constituting the adaptive filter, the output arithmetic processing system 5 of the filter and an update arithmetic processing system 6 for a tap coefficient are individualized. The update arithmetic processing system 6 utilizes a dedicated bus 10 for integrating arithmetic for tap coefficient update requiring a read/write process on a data memory DRM and performs the arithmetic in one machine cycle by the read modify write operation of the data memory. Consequently, the integrating process time which requires two machine cycles before is shortened to lower the operation clock frequency and thus the power consumption is reduced while the processing ability per unit time is secured.