首页> 外国专利> METHOD FOR OPERATING LINEAR FEEDBACK SHIFT REGISTER AS SERIES SHIFT REGISTOR ACCOMPANIED BY CROSS CHECK LATTICE STRUCTURE

METHOD FOR OPERATING LINEAR FEEDBACK SHIFT REGISTER AS SERIES SHIFT REGISTOR ACCOMPANIED BY CROSS CHECK LATTICE STRUCTURE

机译:作为交叉校验格子结构的系列移位寄存器的线性反馈移位寄存器的操作方法

摘要

PURPOSE: To transfer data to an output terminal without change in data by loading a zero logical value into a bit register through a serial data input terminal and shifting them in series. CONSTITUTION: A linear feedback registers 28, which is connected through sense lines 12, 14, 16, and 18, receives input data in series maintaining the parallel input lines at zero logical levels, and operates as a serial shift register. When FF bit register 21 is clocked by a clock 30, a register 21 propagates the contents in series to an output terminal 32 without changing the contents through the following register 21. When the load register 21 is loaded in series here, a multiplexer 24 is made possible. When a zero logical value is thus loaded through an input terminal 31 and the data are serially shifted through the register 21, they can be transferred to the output terminal 32 without changing the contents.
机译:用途:通过将零逻辑值通过串行数据输入端子加载到位寄存器并将它们串行移位,从而将数据传输到输出端子而不改变数据。构成:通过反馈线12、14、16和18连接的线性反馈寄存器28,串行接收输入数据,将并行输入线保持在零逻辑电平,并用作串行移位寄存器。当FF位寄存器21由时钟30提供时钟时,寄存器21将内容串行传播到输出端子32,而不会通过随后的寄存器21改变内容。当加载寄存器21在此串行加载时,多路复用器24为使成为可能。当这样通过输入端子31加载零逻辑值并且通过寄存器21将数据串行移位时,它们可以在不改变内容的情况下被传送到输出端子32。

著录项

  • 公开/公告号JPH03256297A

    专利类型

  • 公开/公告日1991-11-14

    原文格式PDF

  • 申请/专利权人 KUROSUCHIETSUKU TEKUNOROJII INC;

    申请/专利号JP19900266558

  • 发明设计人 ROBAATO JIEI RITSUPU;

    申请日1990-10-05

  • 分类号G06F11/27;G11C19/00;G11C19/38;

  • 国家 JP

  • 入库时间 2022-08-22 05:40:39

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号