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INTERACTIVE ARRANGEMENT CORRECTING METHOD AND INTERACTIVE DESIGN SYSTEM

机译:交互式排列校正方法和交互式设计系统

摘要

PURPOSE:To easily execute arrangement correction while considering the limit value of current density by providing a storing means, arrangement information display means and limit value over display means. CONSTITUTION:A storing means 12 stores the arrangement information of a block as storing arrangement information. An arrangement information display means 13 displays the storing arrangement information onto a practical plane area as display arrangement information. A limit value over display means 14 calculates the number of transistors connected to a power supply bus in respect to the plural rows and columns of the practical plane area according to the storing arrangement information, and calculates the current density in each row and column according to the calculated number of transistors. By comparing the calculated current density in each row and column with the limit value of the current density in the current bus to each row and column, the row or column with the current density exceeding the limit value is displayed on the plane area as a limit value over cell. Thus, the arrangement of the block can be easily corrected while considering the limit value of the current density.
机译:目的:通过提供存储装置,布置信息显示装置和极限值显示装置,在考虑电流密度极限值的同时轻松进行布置校正。构成:存储装置12存储块的布置信息作为存储布置信息。布置信息显示装置13将存储的布置信息显示在实际平面区域上作为显示布置信息。显示装置上的极限值14根据存储布置信息,相对于实际平面区域的多行和多列计算连接到电源总线的晶体管的数量,并根据以下公式计算每行和每列的电流密度:计算出的晶体管数量。通过将计算出的每一行和每一列中的电流密度与当前总线中每一行和每一列中电流密度的极限值进行比较,电流密度超过极限值的行或列将作为限制显示在平面区域上价值超过细胞。因此,在考虑电流密度的极限值的同时,可以容易地校正块的布置。

著录项

  • 公开/公告号JPH03271981A

    专利类型

  • 公开/公告日1991-12-03

    原文格式PDF

  • 申请/专利权人 NEC CORP;

    申请/专利号JP19900069578

  • 发明设计人 UEJIMA SHINJI;

    申请日1990-03-22

  • 分类号H01L21/82;G06F17/50;

  • 国家 JP

  • 入库时间 2022-08-22 05:38:06

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