RESIN SEALED SEMICONDUCTOR DEVICE FOR EXPERIMENT AND STRESS EVALUATION BY RESIN SEALING PROCESS

摘要

PURPOSE:To enable the effect of mechanical stress by the resin sealing process in the side direction of a semiconductor substrate to be evaluated by a method wherein the electrical characteristics of the first electron element are compared with those of the second electron element. CONSTITUTION:MOS field effect transistors 107, 109, 111, 113 comprising the same materials in the same dimensions provided with respective impurity regions are formed on the main surface of a silicon substrate 101. The length from the outer edge 102 represented by l1 of the transistor 107 to the impurity region 115 is 20mum. The length from the outer edge 102 represented by l2 of the transistor 109 to the impurity region 117 is 40mum. The length from the outer edge 102 represented by l3 of the transistor 111 to the impurity region 119 is 80mum. The other length from the outer edge 102 represented by l4 of the transistor 113 to the impurity region 121 is 200mum. In such a constitution, the MOS field effect transistors are formed in said positions to make the experiments in the electrical characteristics of respective MOS field effect transistors.