INFORMATION SYSTEM FOR TROUBLE OF LOOP TRANSMISSION LINE

摘要

PURPOSE:To recognize a trouble on an input transmission line where a bit error occurs frequently by providing each node with a means which detects a signal break on the transmission line and a means which causes a signal break on the transmission line when a bit error rate exceeds a specific value. CONSTITUTION:A parity error monitoring circuit 21 when detecting the frequency of parity error occurrence of a system 1 above the specific value opens an intermittent switch 19 to break an input signal to the system 0. Then, a clock frame synchronism extracting circuit 15 unables to detect the clock and frame synchronizing signal of the system 0 and sends an alarm to a controller 11, which controls a system operation switch 12 to perform switching from the system 0 to a system 1. Therefore, the signal of the system 0 is interrupted at a downstream-side subordinate node and a monitor node, so the abnormality of the system 0 is detected and a trouble part is disconnected.