MULTIPROCESSOR INTELLIGENT CELL FOR A NETWORK WHICH PROVIDES SENSING, BIDIRECTIONAL COMMUNICATIONS AND CONTROL

摘要

A plurality of intelligent cells each of which comprises an integrated circuit having a processor and input/output section coupled to a network for providing sensing, communications and control are described. Each cell includes a multiprocessor (100), input/output section (107-110), memory (115) and associated timing circuits; oscillator (112), and timing generator (111). The multiprocessor (100) is a stack oriented processor having four sets of registers (101), providing inputs to an arithmetic logic unit (ALU) (102). The ALU (102) may comprise two separate ALU's. One portion of memory (115) is used for storing instructions, ROM code (115a). The next portion of the memory is a random-access memory (115b). The third portion of the memory comprises an electrically erasable and electrically programmable read-only memory (EEPROM) (115c). Timing and control are provided to the registers, ALU and memory, whereby each cell is realized.