A high-accuracy charge-balance analog/digital converter comprising a voltage input, a differential integrator and a charge-balance control loop, a pulse-width modulator controlled by a system clock and supplied from the output of the differential integrator being provided in the forward branch of the control loop, the signal generated by the pulse-width modulator and fed back to the differential integrator being a system-clock-frequency pulse signal which has as pulse period an integral multiple of the duration of the period of a super clock, and the analog/digital converter being monolithically integratable or monolithically integrated, at least to the extent of all active electronic components. IMAGE
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