Digital circuit arrangement for approximately realising GMSK (Gaussian minimum shift keying) modulation

摘要

The invention relates to a digital circuit arrangement for approximately realising a GMSK (Gaussian Minimum Shift Keying) modulation, in which a sequence of imaginary and a sequence of real output values are generated from a sequence of binary input values with a linear filter arrangement (2). Depending on two consecutive binary input values, a phase generator (1) emits the real numbers 1 or -1 or the imaginary numbers j or -j as binary coded phase generator values. If two consecutive input values are identical, the numbers are modified in the phase generator in a positive sequence from 1 to j or from j to -1 or from -1 to -j or from -j to 1 and, if two consecutive input values are not identical, they are modified in reverse, negative order. The linear filter arrangement receives the phase generator values. IMAGE