the invention u043eu0442u043du043eu0441u0438u0442u0441u00a0 to computer technology and can be used in devices for digital signal processing. purpose u0438u0437u043eu0431u0440u0435u0442u0435u043du0438u00a0 u00a0u0432u043bu00a0u0435u0442u0441u00a0 increased functional capacity.the device includes n + 1 in the registers, the first, second and third u0432u044bu0447u0438u0442u0430u0442u0435u043bu0438, adder, the first, second and third accommodating u0441u0443u043cu043cu0430u0442u043eu0440u044b, block and u043fu043eu0441u0442u043eu00a0u043du043du043eu0439 u043fu0430u043cu00a0u0442u0438, delay elements, u0442u0440u0435u0445u0432u0445u043eu0434u043eu0432u044bu0439 adder and clock generator.the device u043eu0441u0443u0449u0435u0441u0442u0432u043bu00a0u0435u0442 recursive calculation of two coefficients of u043fu0440u00a0u043cu043eu0439 line u0430u043fu043fu0440u043eu043au0441u0438u043cu0438u0440u0443u044eu0449u0435u0433u043e a functional dependence on the method of naim u0435u043du044cu0448u0438u0445 squares, as well as u0432u044bu0447u0438u0441u043bu00a0u0435u0442 error approximation. u0430u043fu043fu0440u043eu043au0441u0438u043cu0430u0446u0438u00a0 frame u043fu0440u00a0u043cu043eu0439 line u043fu0440u043eu0432u043eu0434u0438u0442u0441u00a0 in u0441u043au043eu043bu044cu0437u00a0u0449u0435u043c mode on u043eu0442u0441u0447u0435u0442u0430u043c signal which sequentially receives at the input of the device.by recursive computation and parallel - conveyor mode device has increased faster with relatively small circuits u043eu0442u0435u0445u043du0438u0447u0435u0441u043au0438u0445 cost. 1 il. i fe
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