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Silicon chip with low-carrier-density oxide passivation - prevents significant narrowing of space-charge region on both sides of PN junctions adjoining diffusion regions
Silicon chip with low-carrier-density oxide passivation - prevents significant narrowing of space-charge region on both sides of PN junctions adjoining diffusion regions
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机译:具有低载流子密度氧化物钝化的硅芯片-防止与扩散区相邻的PN结两侧的空间电荷区明显变窄
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摘要
Within the Si body (1) a heavily p-doped region (22) borders on a lightly n-doped region (2) in which a more heavily doped planar region (4) is contacted by an anode (11). Sepg. diffusion regions (7) of p-type material extend right through the body (1) to a cathode (12). The SiOx layer (10), grown thermally on the Si, extends over the p-n junctions (6,8) and the transition (5) between the planar region (4) and n-region (2). The charge carrier density in this layer (10) is not more than 5 x 10 to power 11 per sq.cm. ADVANTAGE - Variability, differential thermal expansion and poor structurability of glass passivation layers are avoided.
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