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Output buffer circuit with signal feed forward for reducing switching induced noise

机译:具有信号前馈的输出缓冲电路,可减少开关引起的噪声

摘要

An output buffer circuit reduces switching induced noise in integrated circuit devices. A pulldown feed forward circuit is coupled between the input and the output pulldown transistor. The pulldown feed forward circuit bypasses at least some of the intermediate circuit elements of the output buffer circuit. The pulldown feed forward circuit initiates a relatively small sinking current through the output pulldown transistor in response to a first signal at the input before the intermediate circuit elements initiate relatively large sinking current through the output pulldown transistor means. A pullup feed forward circuit is coupled between the input and the output pullup transistor means. The pullup feed forward circuit bypasses at least some of the intermediate circuit elements of the output buffer circuit. The pullup feed forward circuit initiates a relatively small sourcing current through the output pullup transistor means in response to a second signal at the input before the intermediate circuit elements initiate the relatively large sinking current through the output pullup transistor. The output pulldown may include a relatively large current carrying capacity primary pulldown transistor element and a relatively small current carrying capacity secondary pulldown transistor element. The primary pulldown predriver is coupled to drive the primary pulldown transistor element, and the secondary pulldown predriver is coupled to drive the secondary pulldown transistor element. A similar circuit arrangement is provided for output pullup.
机译:输出缓冲电路减少了集成电路器件中的开关感应噪声。下拉前馈电路耦合在输入和输出下拉晶体管之间。下拉前馈电路绕过输出缓冲电路的至少一些中间电路元件。下拉前馈电路在中间电路元件通过输出下拉晶体管装置启动较大的吸收电流之前,响应输入端的第一信号,通过输出下拉晶体管产生较小的吸收电流。上拉前馈电路耦合在输入和输出上拉晶体管装置之间。上拉前馈电路绕过输出缓冲电路的至少一些中间电路元件。上拉前馈电路响应于输入的第二信号,在中间电路元件启动通过输出上拉晶体管的相对较大的灌电流之前,通过输出上拉晶体管装置启动相对较小的拉电流。输出下拉可包括相对较大的载流能力的初级下拉晶体管元件和相对较小的载流能力的次级下拉晶体管元件。初级下拉预驱动器被耦合以驱动初级下拉晶体管元件,并且次级下拉预驱动器被耦合以驱动次级下拉晶体管元件。提供了类似的电路布置用于输出上拉。

著录项

  • 公开/公告号US5081374A

    专利类型

  • 公开/公告日1992-01-14

    原文格式PDF

  • 申请/专利权人 NATIONAL SEMICONDUCTOR CORPORATION;

    申请/专利号US19900483927

  • 发明设计人 JEFFREY B. DAVIS;

    申请日1990-02-22

  • 分类号H03K19/02;H03K5/12;

  • 国家 US

  • 入库时间 2022-08-22 05:23:27

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