首页> 外国专利> Semiconductor memory device having input/output data signal lines propagating data bit at high-speed regardless of fluctuation in power voltage level

Semiconductor memory device having input/output data signal lines propagating data bit at high-speed regardless of fluctuation in power voltage level

机译:具有输入/输出数据信号线高速传播数据位的半导体存储器件,而与电源电压电平的波动无关

摘要

A semiconductor memory device comprises memory cells arranged in matrix, a plurality of bit line pairs respectively coupled to the columns of the memory cells, a plurality of word lines respectively coupled to the rows of the memory cells and selectively activating the memory cells for porducing small differences in voltage level on the plurality of bit line pairs, respectively, a plurality of sense amplifier circuits respectively coupled to the plurality of bit line pairs and selectively coupling component bit lines of the bit lines pairs to first and second voltage sources depending upon the small differences, first and second data signal lines, a column selector circuit coupling the first and second data signal lines with one of the plurality of bit line pairs, and a pull-up circuit coupled between the first voltage source and the first and second data signal lines for allowing voltage levels on the first and second data signal lines to vary within a predetermined voltage range, wherein a small current path is coupled between the first and second data signal lines and causes the voltage level on one of the first and second data signal lines to follow the other data signal line upon fluctuation at the first voltage source.
机译:半导体存储器件包括:以矩阵形式布置的存储单元;分别耦合到存储单元的列的多个位线对;分别耦合到存储单元的行并选择性地激活存储单元以产生小的多条字线。分别在多个位线对上的电压电平的差异,多个感测放大器电路分别耦合到多个位线对,并根据其大小,选择性地将位线对的分量位线耦合到第一和第二电压源差,第一和第二数据信号线,将第一和第二数据信号线与多个位线对之一耦合的列选择器电路,以及在第一电压源与第一和第二数据信号之间耦合的上拉电路允许第一和第二数据信号线上的电压电平在预定电压范围内变化的线路在第一和第二数据信号线之间耦合有一个小电流路径,并在第一电压源发生波动时使第一和第二数据信号线之一上的电压电平跟随另一数据信号线。

著录项

  • 公开/公告号US5124947A

    专利类型

  • 公开/公告日1992-06-23

    原文格式PDF

  • 申请/专利权人 NEC CORPORATION;

    申请/专利号US19900615738

  • 发明设计人 KAZUHIRO NAKADA;

    申请日1990-11-19

  • 分类号G11C11/40;

  • 国家 US

  • 入库时间 2022-08-22 05:22:40

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