首页> 外国专利> METHOD FOR CORRECTING CHARACTERISTIC OF DELAY LINE AND METHOD FOR MEASURING TIME INTERVAL OF DELAY LINE

METHOD FOR CORRECTING CHARACTERISTIC OF DELAY LINE AND METHOD FOR MEASURING TIME INTERVAL OF DELAY LINE

机译:延迟线特性的校正方法和延迟线时间间隔的测量方法

摘要

PURPOSE: To perform the accurate measurement by providing a bus in a timing counter, and correcting the characteristic of a delay line on the basis of a timing difference of a reference clock and an arming clock per a digital set value of a delay line. ;CONSTITUTION: When a SW1 is set so that a reference clock (REFclk) is input to an IN1, and a SW2 and a SW3 are set so that an arming clock (ARMclk) is input to a terminal IN2, to which the signal is input, an ARMclk is input to the IN2. A gate 21 measures a timing difference of the REFclk and the ARMclk of each digital set value d of a delay line DL2, which is obtained by a control computing device. A real delay time 7d is housed so as to correspond to a set value d inside of a memory 22 to perform the soft ware processing of the delay time, τd Since correction values for characteristics of gain, off-set and linearity or the like of DL2 are thereby obtained to secure the time relationship of the ARMclk to the REFclk, delay timing can be set accurately.;COPYRIGHT: (C)1993,JPO&Japio
机译:目的:通过在定时计数器中提供一条总线,并根据参考时钟和布防时钟的定时差/延迟线的数字设置值来校正延迟线的特性,以进行准确的测量。 ; CONSTITUTION:设置SW 1 以便将参考时钟(REFclk)输入到IN 1 ,SW 2 和设置SW 3 ,以便将布防时钟(ARMclk)输入到输入信号的端子IN 2 ,将ARMclk输入到IN < Sub> 2 。门21测量由控制计算装置获得的延迟线DL 2 的每个数字设置值d的RECflk和ARMclk的定时差。实际延迟时间7d被容纳为对应于存储器22内部的设定值d,以执行延迟时间τ d 的软件处理。从而获得DL 2 的集合和线性等,以确保ARMclk与RECflk的时间关系,可以准确地设置延迟时间。;版权:(C)1993,JPO&Japio

著录项

  • 公开/公告号JPH05264629A

    专利类型

  • 公开/公告日1993-10-12

    原文格式PDF

  • 申请/专利权人 YOKOGAWA HEWLETT PACKARD LTD;

    申请/专利号JP19920056400

  • 发明设计人 NISHIMURA HIROSHI;HOSAKA HIROSHI;

    申请日1992-02-06

  • 分类号G01R31/00;G01R31/28;

  • 国家 JP

  • 入库时间 2022-08-22 05:21:16

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