DISCRETE COSINE CONVERSION CIRCUIT, AND INVERSE CONVERSION CIRCUIT FOR DISCRETE COSINE CONVERSION

摘要

PURPOSE:To realize an arithmetic operation by a simple constitution at more than 4m time speed by making in parallel supplied matrix data into every 4m piece by an S/P conversion circuit, and successively supplying the data directly to an inner product arithmetic circuit. CONSTITUTION:This circuit is equipped with a serial/parallel (S/P) conversion circuit 2 as a paralleling means, first quanternary inner product arithmetic circuits 31-34 whose coefficients are +1 and -1, second hexadecimal inner product arithmetic circuits 41-44 whose coefficients are 0, +1 and -1, and third quanternary inner product arithmetic circuits 51-54 including a memory in which the constant matrix data components are stored. Then, the supplied matrix data are made in parallel into every 4m piece, and the data made in parallel are successively supplied directly to the quanternately inner product means whose 4m pieces of coefficients arranged in parallel are +1 and -1, and the quanternary inner product arithmetic means in which the constant matrix data components of the hexadecimaly (or secondary and octanary) inner product arithmetic means whose coefficients are 0, +1, and -1 are stored.