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METHOD AND APPARATUS FOR REMOVING REDUNDANCY USING PSEUDO-ALGEBRAIC METHOD

机译:用伪代数方法消除冗余的方法和装置

摘要

PURPOSE: To optimize the final constitution of a logic network by removing redundancy in a signal path generated by the reconvergence of a signal by using Boolean algebra method. CONSTITUTION: Mending D algorithm analysis is used related with Boolean algebra analysis for analyzing a logic network. In this case, cones 102 and 104 end with root pins. That is, the cone 102 ends with a root pin 112(P1), and the cone 104 ends with a root pin 114(P2). The root pins 112 and 114 are substantially inputs to a logic at a following stage, and for example, shown as an AND logical block 118. An input signal constituting each leave of the cones 102 and 104 passes the combined logic of several stages before reaching each root pin. An AND logical function is executed first by the logical block 118 in the Boolean expression for defining the logical signal of a node so that a node 120 is a product node.
机译:目的:通过使用布尔代数方法消除信号再收敛所产生的信号路径中的冗余,从而优化逻辑网络的最终结构。组成:修补D算法分析与布尔代数分析一起用于逻辑网络分析。在这种情况下,圆锥102和104以根销结束。即,锥体102以根销112(P1)结束,并且锥体104以根销114(P2)结束。根引脚112和114在随后的阶段基本上是逻辑的输入,例如,显示为“与”逻辑块118。构成圆锥102和104的每个离开的输入信号在到达前都会经过几级的组合逻辑每个根引脚。首先由布尔表达式中的逻辑块118执行与逻辑功能,以定义节点的逻辑信号,使得节点120是乘积节点。

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