(57) Abstract Objective The data tonnage inside the data buffer circuit the rightTo make that it grasps definite possible, at the same time in alteration of memory capacityAlteration of the relation circuit is made unnecessary. Constitution FIF whose writing and reading out of the data are possibleO memory the writing time of the data for 1 and this memoryThe day when it is configurated from the counter-circuit 2 which number calculation is done and CPUThe set value holding circuit 4 containment the value of the ta tonnage and this set value preservationIt outputs from the data tonnage and the aforementioned counter-circuit which are output from the holding circuitWhen it compares with the frequency of writing which is done, both agree,The comparator containment the output of 3 which outputs the signal and this comparator,The comparison output containment which outputs the interrupt signal vis-a-vis te CPUIt consists the circuit 5.
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