DIGITAL SIGNAL PROCESSOR SELECTIVELY EXECUTING CORDIC, DIVISION, OR SQUARE ROOT CALCULATION

摘要

PURPOSE: To constitute an economical counting system with a practically sufficient processing speed, which is suited to the measurement of a power by obtaining a bit serial processor which selectively executes a successive step for executing CORDIC, nonrestorable division, or nonrestorable square root calculation by a successive rough estimation. ;CONSTITUTION: A CORDIC processor 40 operates the non-restoration division and the non-restoration square root extraction by repeating a sort. The CORDIC processor 40 is integrated with a monolithic integrated circuit 5 equipped with sigma/delta converters 21-26 which convert the output signals of plural sense transforms 11-16 into bit serial/digital formats, and bit serial multiplication/ addition processor 30. The measuring system of an alternating power is constituted of the monolithic integrated circuit 5, a programmable memory PROM 9, and the plural sense transforms 11-16.;COPYRIGHT: (C)1993,JPO&Japio