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SOFTWARE CONFIGURABLE MEMORY ARCHITECTURE FOR DATA PROCESSING SYSTEM HAVING GRAPHICS CAPABILITY

机译:具有图形功能的数据处理系统的软件可配置内存体系结构

摘要

ABSTRACT OF THE INVENTIONA graphics data processing system memory isallocatable by software between system memory andgraphics framebuffer storage. The memory comprisestwo-port elements connected in parallel from the RAMport to a controller connected to a bus, and havingserial output ports connected to output circuitry tomap the storage to a display. Correspondinglocations, relative to element origin, in allelements are addressed in parallel as an array.Three modes of memory transactions are allaccomplished as array accesses. First, a processorreads/writes the system memory portion by acombination of parallel array access and transfersbetween controller and bus in successive bus cycles.Second, the controller executes atomic graphicsoperations on the framebuffer storage usingsuccessive array accesses; third, the processor canread/write a framebuffer pixel, by an array access offramebuffer storage with masking of unaddressedpixels. An interface arbitrates among requests formemory access.
机译:发明内容图形数据处理系统内存为可通过软件在系统内存和图形帧缓冲区存储。内存包括从RAM并行连接的两个端口元件连接到总线的控制器的端口,并具有串行输出端口连接到输出电路将存储映射到显示器。相应相对于元素原点的位置元素作为数组并行寻址。内存交易的三种模式都是完成为数组访问。首先,一个处理器读/写系统内存部分并行数组访问和传输的结合在连续的总线周期中控制器和总线之间。其次,控制器执行原子图形使用以下命令对帧缓冲区存储进行操作连续的数组访问;第三,处理器可以通过数组访问来读取/写入帧缓冲像素带有未寻址掩蔽的帧缓冲区存储像素。接口在请求之间进行仲裁内存访问。

著录项

  • 公开/公告号CA1312963C

    专利类型

  • 公开/公告日1993-01-19

    原文格式PDF

  • 申请/专利权人 DIGITAL EQUIPMENT CORPORATION;

    申请/专利号CA19880583846

  • 发明设计人 KELLEHER BRIAN;FURLONG THOMAS C.;

    申请日1988-11-23

  • 分类号G09G1/16;

  • 国家 CA

  • 入库时间 2022-08-22 05:08:55

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