PROCESSING OF MEMORY ACCESS EXCEPTIONS WITH PRE-FETCHED INSTRUCTIONS WITHIN THE INSTRUCTION PIPELINE OF A VIRTUAL MEMORY SYSTEM-BASED DIGITAL COMPUTER

摘要

PROCESSING OF MEMORY ACCESS EXCEPTIONSWITH PRE-FETCHED INSTRUCTIONSWITHIN THE INSTRUCTION PIPELINE OFA VIRTUAL MEMORY SYSTEM-BASEDDIGITAL COMPUTERABSTRACTA technique for processing memory access exceptionsalong with pre-fetched instructions in a pipelinedinstruction processing computer system is based upon theconcept of pipelining exception information along withother parts of the instruction being executed. Inresponse to the detection of access exceptions at apipeline stage, corresponding fault information isgenerated and transferred along the pipeline. The faultinformation is acted upon only when the instructionreaches the execution stage of the pipeline. Each stageof the instruction pipeline is ported into the front endof a memory unit adapted to perform thevirtual-to-physical address translation; each port beingprovided with means for storing virtual addressesaccompanying an instruction as well as means for storingcorresponding fault information. When a memory accessexception is encountered at the front end of the memoryunit, the fault information generated therefrom is loadedinto the storage means and the port is prevented fromaccepting further references.