首页> 外国专利> ALTERNATE MASTER BURSTING DATA RATE MANAGEMENT TECHNIQUES FOR USE IN COMPUTER SYSTEMS HAVING DUAL BUS ARCHITECTURE

ALTERNATE MASTER BURSTING DATA RATE MANAGEMENT TECHNIQUES FOR USE IN COMPUTER SYSTEMS HAVING DUAL BUS ARCHITECTURE

机译:在具有双总线体系结构的计算机系统中使用的备用主数据速率管理技术

摘要

Methods and apparatus are set forth which optimize andbalance the use of processor card (or complex) resources(e. g., memory, the local bus, etc .), with the use of othersystem resources, such as the card to card communicationsbus and devices attached thereto, in dual bus computingsystems. A new data rate management technique reduces datatransfer overhead particularly for burst mode transfers.The invention promptly services pending memory refreshrequests; limits multiple accesses to on card (or processorcomplex) memory by an Alternate Bus Master to apredetermined number of cycles where the processor requeststhe use of its local bus; and allows an Alternate Bus Masterunlimited accesses to the processor local bus when theAlternate Bus Master owns the card to card communicationsbus and the processor subsequently requests that bus. Theaforementioned balance of resources is achieved using a BusHold On Grant ("BSHOG") scheduling procedure which, assuminga bursting Alternate Bus Master has gained control of thelocal processor bus and is conducting data transfer cycleswhen the processor requests the local bus, allows theAlternate Bus Master to conditionally retain local busownership over a plurality of Alternate Bus Master datatransfer cycles.
机译:提出了优化和优化方法和装置。平衡处理器卡(或复杂)资源的使用(例如,内存,本地总线等),并使用其他系统资源,例如卡对卡通信双总线计算中的总线及其连接的设备系统。一种新的数据速率管理技术可减少数据传输开销,尤其是对于突发模式传输。本发明迅速服务于未决的存储器刷新要求;限制对卡(或处理器)的多次访问备用总线主控器存储到一个处理器请求的预定周期数使用当地巴士;并允许备用总线主无限访问处理器本地总线时备用总线主拥有卡对卡的通信总线,处理器随后请求该总线。的使用总线可以实现上述资源平衡保留授予(BSHOG)调度程序,其中假定突发的备用总线主控已经控制了本地处理器总线,并正在进行数据传输周期当处理器请求本地总线时,允许备用公交车主有条件保留本地公交车多个备用总线主数据的所有权转移周期。

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