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System for facilitating planar probe measurements of high-speed interconnect structures

机译:用于促进高速互连结构的平面探针测量的系统

摘要

An adapter (22), having a dielectric substrate (30) upon which are mounted an array of uniformly-spaced, coplanar conductive strips (32) and impedance standards (40,46,48,50) having similarly spaced coplanar leads (44), facilitates planar transmission line probe measurements of the high speed-electrical characteristics of a package or other interconnect structure (10) for a high-speed integrated circuit. The conductive strips (32) of the adapter (22) are connected to the terminals (18) of the package (10) so as to simulate the integrated circuit connection, that is, with substantially identical length and spacing of bond wires (24). The planar probe (26), by contacing the conductive strips (32) of the adapter, is able to measure the electrical characteristics of the package (10) including the bond wires (24), thereby providing realistic measurements of the integrated circuit's environment. The impedance standards (40,46,48,50) on the adapter are specially designed to enable the effects of the adapter to be removed from the measurements by calibration.
机译:适配器(22),具有介电基板(30),其上安装有均匀间隔的共面导电带(32)和具有类似间隔的共面引线(44)的阻抗标准(40,46,48,50)的阵列图1的电路图便于平面传输线探针测量高速集成电路的封装或其他互连结构(10)的高速电特性。适配器(22)的导电条(32)连接到封装(10)的端子(18),以便模拟集成电路连接,即,键合线(24)的长度和间距基本相同。 。平面探针(26)通过污染适配器的导电条(32),能够测量包括键合线(24)的封装(10)的电特性,从而提供对集成电路环境的实际测量。适配器上的阻抗标准(40、46、48、50)经过特殊设计,可以通过校准从测量中消除适配器的影响。

著录项

  • 公开/公告号EP0445928A3

    专利类型

  • 公开/公告日1992-11-25

    原文格式PDF

  • 申请/专利权人 CASCADE MICROTECH INC.;

    申请/专利号EP19910301200

  • 申请日1991-02-14

  • 分类号G01R31/28;G01R35/00;G01R1/073;G01R27/28;G01R1/04;

  • 国家 EP

  • 入库时间 2022-08-22 05:07:01

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