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System for exact arithmetic computation including quadratic extensions

机译:用于精确算术计算的系统,包括二次扩展

摘要

An arithmetic processor for a digital data processing system, and methods of operating same, employing a Truncated Dyadic Arithmetic (TDA) number representation for implementing exact equality testing of the results of rational arithmetic computations. The arithmetic processor includes circuitry for receiving a digital representation of a number, a register for storing the received number in a truncated dyadic arithmetic representation, including a mantissa field having m bits and an order field having o bits. A modulo field associated with each number is also stored or otherwise maintained. The arithmetic processor further includes circuitry for operating on the stored number in accordance with one or more arithmetic operations, including addition, subtraction, division, multiplication and square root, to obtain a result that is expressed in the truncated dyadic arithmetic representation. Additional circuitry compares the result to another result obtained from another truncated dyadic arithmetic operation.
机译:用于数字数据处理系统的算术处理器及其操作方法,采用截短的二进位算术(TDA)数字表示,以实现对有理算术计算结果的精确相等性测试。算术处理器包括用于接收数字的数字表示的电路,用于将接收到的数字存储在截短的二进位算术表示中的寄存器,该寄存器包括具有m位的尾数字段和具有o位的阶数字段。与每个数字相关的模字段也被存储或以其他方式维护。算术处理器还包括用于根据一个或多个算术运算(包括加法,减法,除法,乘法和平方根)对存储的数字进行运算的电路,以获得以截短的二进位算术表示表示的结果。附加电路将结果与从另一个截短的二进位算术运算获得的另一个结果进行比较。

著录项

  • 公开/公告号EP0471927A3

    专利类型

  • 公开/公告日1993-07-21

    原文格式PDF

  • 申请/专利权人 INTERNATIONAL BUSINESS MACHINESCORPORATION;

    申请/专利号EP19910108589

  • 发明设计人 DEMONTAUDOUIN YVES;

    申请日1991-05-27

  • 分类号G06F7/38;G06F7/04;G06F7/49;G06F7/552;

  • 国家 EP

  • 入库时间 2022-08-22 05:06:11

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