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Viterbi decoder with computer for input data branching - operates by majority logic on content of max. likelihood path obtd. from add-compare-select calculator.

机译:具有计算机的Viterbi解码器,用于输入数据分支-通过多数逻辑对最大内容进行操作。似然路径。从加比较选择计算器中。

摘要

The decoder computes (3) the amount of branching for input data w.r.t. a number of time slots as a reference for parallel computations. The parallel computations are performed in an add-compare-select standardising circuit (4) w.r.t. an accumulation (6) of branching amts. up to preceding processing stages. The sequence of min. distance is decided (8) by majority decoding of input data corresp. to the content of the computed path (7) in an appropriate interval of time slots. USE/ADVANTAGE - In HDTV reception at more than 30 Megabits per second. Speed limitation set by computation rate of loop within one time slot is overcome.
机译:解码器计算(3)输入数据w.r.t的分支量。多个时隙作为并行计算的参考。在加法比较选择标准化电路(4)中进行并行计算。分支分支的积累(6)。直至之前的处理阶段。最小顺序距离由输入数据对应的多数解码确定(8)。在适当的时隙间隔内达到计算路径(7)的内容。使用/优势-在HDTV接收中,每秒超过30兆比特。克服了由一个时隙内循环的计算速率设置的速度限制。

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