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Transceiver with isolated power rails for ground bounce reduction

机译:带有隔离电源轨的收发器,可减少地面反弹

摘要

Circuit configurations are described for use with split lead leadframes and relatively isolated quiet and noisy power rails to reduce power rail noise and circuit noise. An octal register transceiver circuit incorporates a latch (300) coupled to relatively quiet power rails (42,44) and an output buffer circuit (400) having an input circuit coupled to the latch (300) and relatively quiet power rails (42,44). The output driver transistors (Q433,Q434) of the output buffer circuit (400) are coupled to the relatively noisy output power rails (52,54) to isolate the latch circuit from power rail noise and minimize erroneous operation of the latch. A DC Miller Killer circuit (450) is constructed with delay control components (D456,D457,R460) and an alternative discharge path (R458,D459) to reduce aggravation of power rail noise during operation of DCMK.
机译:描述了电路配置,该电路配置用于分离的引线引线框和相对隔离的安静且有噪声的电源轨,以减少电源轨噪声和电路噪声。八进制寄存器收发器电路包括耦合到相对安静的电源轨(42,44)的锁存器(300)和具有耦合到锁存器(300)和相对安静的电源轨(42,44)的输入电路的输出缓冲电路(400)。 )。输出缓冲电路(400)的输出驱动器晶体管(Q433,Q434)耦合到相对嘈杂的输出电源轨(52,54),以将锁存电路与电源轨噪声隔离,并使锁存器的错误操作最小化。 DC Miller Killer电路(450)由延迟控制组件(D456,D457,R460)和备用放电路径(R458,D459)构成,以减少DCMK工作期间电源轨噪声的恶化。

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