Analogue-to-digital converter having two decimate filter circuits receiving output of a front end which is bit shifted down in being applied to one of the filter circuits

摘要

In an apparatus for converting an analogue signal to a digital signal, the analogue signal is sampled by a sampling pulse having a multiple frequency (N fs, N is an integer) of a nominal sampling frequency (fs) so as to generate an M bit (M is an integer) digital signal, first and second decimate filter circuits receive the M bit digital signal and provide a multiple M (P M, P is an integer) bit digital signal having the nominal sampling frequency fs, the first decimate filter circuit receives the M bit digital signal at upper M input terminals and the second decimate filter circuit receives the M bit digital signal by bit shift down, and the multiple M bit digital signals output from the first and second decimate filter circuits are added to provide a digital output signal. Therefore, when an analogue audio signal is converted into a digital audio signal, the disturbance of lower bit data by higher bit data can be reduced so that the quality of a reproduced sound can be improved.