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Memory control system for controlling a first and second processing means to individually access a plurality of memory blocks

机译:用于控制第一和第二处理装置以分别访问多个存储块的存储器控​​制系统

摘要

First processing means designates a plurality of individually accessible memory blocks of memory means in a predetermined order and performs processing thereon block by block. Second processing means sequentially process those blocks, block by block, which have already been processed by the first processing means.
机译:第一处理装置以预定顺序指定存储装置的多个可单独访问的存储块,并在其上逐块执行处理。第二处理装置逐块顺序地处理已经由第一处理装置处理过的那些块。

著录项

  • 公开/公告号US5210852A

    专利类型

  • 公开/公告日1993-05-11

    原文格式PDF

  • 申请/专利权人 CASIO COMPUTER CO. LTD.;

    申请/专利号US19900602097

  • 发明设计人 TETSUYA SATO;

    申请日1990-10-23

  • 分类号G06F13/00;

  • 国家 US

  • 入库时间 2022-08-22 04:58:23

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