High order switched-capacitor filter with DAC input

摘要

A digital-to-analog converter includes a delta-sigma modulator (10) that receives a digital input and converts it to a one-bit digital output stream. A fourth order switched-capacitor filter (12) is operable to receive the one-bit digital stream and convert it to an analog value int he sampled data domain. This is input to a switched- capacitor/continuous time buffer (14) which is then filtered by an active low pass filter (18) to provide an analog output. The switched-capacitor filter (12) includes four stages of integration (24), (30), (34) and (38). A one-bit DAC (20) is provided for converting the one-bit digital stream to an analog value. The one-bit DAC (20) is integral with the first stage of integration and is summed by a summing junction (22) with the output of the forth stage of integration (38). In this manner, the first stage of integration (24) is operable to influence or reduce the noise output by the fourth stage of integration (38), thus resulting in a low noise high order switched- capacitor filter.