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deijitsuto line balance level revision method
deijitsuto line balance level revision method
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机译:deijitsuto线余额水平修改方法
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摘要
PURPOSE:To balance a sense margin, and also, to prevent a digit line from receiving noise of other digit lines by short-circuiting a pair of digit lines at the time of precharge, and also, connecting an external capacity. CONSTITUTION:A precharge signal phiP1 becomes L, a word line WL rises and a sense operation starts, and H or L of a digit line is decided. In this active period, a reset signal phiP2 becomes H, and the level of a nodal point N21 is pulled down. Subsequently, when a precharge operation is started, the signal phiP2 and the word line WL fall, and thereafter, the signal phiP1 becomes H. As a result, the digit lines DL, the inverse of DL are short-circuited by a transistor TR Q21, and by capacity division, the levels of the lines DL, the inverse of DL become 1/2VCC theoretically. Simultaneously, the lines DL, the inverse of DL are connected to an external capacity C21 by TRs Q22, Q23, and since the capacity division to this capacity C21 is also added, the level of the lines DL, the inverse of DL drops down a little from exact 1/2VCC, and becomes a corrected 1/2VCC level. Also, said line does not become a noise source.
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