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SPREAD SPECTRUM COMMUNICATION SYNCHRONIZING SYSTEM

机译:扩频通信同步系统

摘要

PURPOSE:To shorten the time up synchronization by detecting a peak with N pieces of matching filters and selecting the maximum of added values. CONSTITUTION:An inverse spread arithmetic part 2 delays an input signal with a clock at the velocity of N multiple (N is a natural number of =2) of the inverse of a spread rate while using a delay line 1, a weighting coefficient for inverse spread is multiplied for every N pieces of taps of the delay line 1, and the outputs of the same order in the N pieces of taps are synthesized. Thus, the N pieces of matching filters for performing the arithmetic of inverse spread are formed. On the other hand, N pieces of added value arithmetic parts 4 are provided, the outputs of the respective matching filters are delayed by a delay line 3, and peak points at the outputs of respective taps in the delay line 3 are added and outputted. Further, the maximum value of the arithmetic part 4 is selected by a maximum value selection part 5, and this maximum value is supplied to the delay lines 1 and 3 while controlling clock timing at a clock timing control part 6 so as to increase the value.
机译:目的:通过使用N个匹配滤波器检测一个峰值并选择最大相加值,来缩短同步时间。组成:逆扩展算术部分2使用时延线1时,以扩展速度的倒数的N倍(N是自然数> = 2的自然数)的速度延迟带有时钟的输入信号,加权系数用于对延迟线1的每N个抽头乘以逆展频,并合成N个抽头中相同顺序的输出。因此,形成了用于执行逆扩展算术的N个匹配滤波器。另一方面,设置了N个加值运算部分4,各个匹配滤波器的输出被延迟线3延迟,并且延迟线3中各个抽头的输出处的峰值被相加并输出。此外,算术部4的最大值由最大值选择部5选择,并且将该最大值提供给延迟线1和3,同时在时钟定时控制部6控制时钟定时以增大该值。 。

著录项

  • 公开/公告号JPH0677928A

    专利类型

  • 公开/公告日1994-03-18

    原文格式PDF

  • 申请/专利权人 FUJITSU LTD;

    申请/专利号JP19920226803

  • 申请日1992-08-26

  • 分类号H04J13/00;

  • 国家 JP

  • 入库时间 2022-08-22 04:50:06

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