首页> 外国专利> BINARY FLOATING POINT ARITHMETIC ROUNDING IN CONFORMANCE WITH IEEE 754-1985 STANDARD

BINARY FLOATING POINT ARITHMETIC ROUNDING IN CONFORMANCE WITH IEEE 754-1985 STANDARD

机译:符合IEEE 754-1985标准的二进制浮点运算法则

摘要

2045662 9110189 PCTABS00006A method and a high speed processor (HSP) incorporating thatmethod are set forth for processing signals representing outputsgenerated by remainderless division algorithms (102) andremainderless square root algorithms so as to obtain rounded outputs (112)conforming to the IEEE 754-1985 binary floating point arithmeticstandard. The method and procedure of the present invention allowthe solutions of floating-point computations to be rounded suchthat sign bits, as well as binary bits, of the rounded results arein full compliance with all guidelines of the stated standard.
机译:2045662 9110189 PCTABS00006结合了该方法和方法的高速处理器(HSP)阐述了用于处理代表输出的信号的方法由余数除法算法(102)生成余数平方根算法以获得舍入后的输出(112)符合IEEE 754-1985二进制浮点算法标准。本发明的方法和过程允许四舍五入的浮点计算解决方案四舍五入结果的符号位和二进制位是完全符合所述标准的所有准则。

著录项

  • 公开/公告号CA2045662C

    专利类型

  • 公开/公告日1994-04-26

    原文格式PDF

  • 申请/专利权人 MOTOROLA INC.;

    申请/专利号CA19902045662

  • 发明设计人 LINDSLEY BRETT LOUIS;LIU CLIF;

    申请日1990-12-17

  • 分类号G06F7/38;

  • 国家 CA

  • 入库时间 2022-08-22 04:42:34

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