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AREA-EFFICIENT IMPLICATION CIRCUITS FOR VERY DENSE LUKASIEWICZ LOGIC ARRAYS
AREA-EFFICIENT IMPLICATION CIRCUITS FOR VERY DENSE LUKASIEWICZ LOGIC ARRAYS
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机译:非常密集的LUKASIEWICZ逻辑阵列的有效区域蕴含电路
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摘要
A one-diode circuit for negated implication (∩←) is derived from a 12-transistor Lukasiewicz implication circuit (←). The derivation also yields an adjustable three-transistor implication circuit with maximum error less than 1 % of full scale. Two Lukasiewicz logic arrays (£LAs) are proposed that use area-efficient implementations of the one-diode and three-transistor implication circuits. The very dense diode-tower (£LA) contains 36,000 implications in an area that previously held 92 implications; the three-transistor (£LA) contains 1,990 implications. Both £LAs double the number of inputs per pin on the IC package. Very dense £LAs make £LA-based fuzzy controllers and neural networks practical. The three-transistor implication circuit comprises three current mirror circuits to provide an implication pair. The implication circuit is arranged to receive two inputs (A-B and C-D) and to provide a single output ((A←B)-(C←D)). The implication circuit uses TRUE reference currents (TrueAB and TrueCD) to adjust the output value or range of the paired implication cell. Such £LAs can be used practically as aritficial retina cells that detect edges in 15 nanoseconds.
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