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Accessing memory in HDLC communications protocol hardware machine system with server

机译:使用服务器访问HDLC通信协议硬件机器系统中的内存

摘要

The processor has the function of emulating the operation of a number of independent transmitter and receiver modules. The machine has an HDLC server (10) that consists of the HDLC machine (12), a microprocessor (14) and a RAM memory. The HDLC machine has three sub-systems, i.e. address logic (50), control logic (70) and an address generator (90). The microprocessor is a universal type with ports for input and output functions. The system operates to access the system memory and to analyse segments of data.
机译:处理器具有模拟多个独立的发送器和接收器模块的操作的功能。该机器具有HDLC服务器(10),该服务器由HDLC机器(12),微处理器(14)和RAM存储器组成。 HDLC机器具有三个子系统,即地址逻辑(50),控制逻辑(70)和地址生成器(90)。微处理器是通用类型,带有用于输入和输出功能的端口。系统进行操作以访问系统内存并分析数据段。

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