首页> 外国专利> Processor has a plurality of unit box microprogrammed with the following description of embodiment early instructions.

Processor has a plurality of unit box microprogrammed with the following description of embodiment early instructions.

机译:处理器具有多个用实施例早期指令的以下说明微编程的单元盒。

摘要

The processor (cpu) is composed of several units of execution microprogrammed (rad, bdp, pwf) communicating with each other and with a memory (mu) by means of a cache memory (ca). One of the units is an addressing unit (rad). br / to enable the units operate independently, each unit comprises its own control unit and the synchronization means in order to allow or to interrupt the execution of the microprogram defined by the instruction is in progress in said unit. & br / each control unit comprises means of control of the instructions in order to initiate the execution of the micro-program of the first instruction standby. The last microinstruction includes an indication of the end of the microprogram and for certain units, an indication of the anticipation for conditioning the control means so as to allow the execution of the micro-program of the instruction in a waiting position before a preceding instruction is not completely terminated. & br / application to the data processing systems using of the processors optimized for executing the instructions.
机译:处理器(cpu)由微执行的几个执行单元(rad,bdp,pwf)组成,它们通过高速缓存(ca)相互通信,并与一个存储器(mu)通信。单元之一是寻址单元(rad)。为了使这些单元能够独立操作,每个单元包括其自己的控制单元和同步装置,以允许或中断由所述单元中正在进行的指令定义的微程序的执行。 &每个控制单元包括对指令的控制装置,以便启动第一指令待机的微程序的执行。最后的微指令包括对微程序结束的指示以及对于某些单元的指示,其用于对控制装置进行调节的预期的指示,以便允许在等待指令之前在等待位置执行指令的微程序。没有完全终止。 &使用为执行指令而优化的处理器将其应用于数据处理系统。

著录项

  • 公开/公告号FR2656442B1

    专利类型

  • 公开/公告日1994-07-29

    原文格式PDF

  • 申请/专利权人 BULL SA;

    申请/专利号FR19890016952

  • 申请日1989-12-21

  • 分类号G06F13/10;G06F9/30;G06F15/16;

  • 国家 FR

  • 入库时间 2022-08-22 04:34:00

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