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Semiconductor memory device including nonvolatile memory cells, enhancement type load transistors, and peripheral circuits having enhancement type transistors

机译:半导体存储器件,包括非易失性存储单元,增强型负载晶体管以及具有增强型晶体管的外围电路

摘要

A semiconductor memory device comprises a non-volatile memory cell array having a plurality of memory cells, enhancement type load transistors having a threshold voltage, and at least one peripheral circuit, such as level shifters, a column decoder, etc., including enhancement type transistors having a threshold voltage. For increasing the writing speed of the memory cells, the threshold voltage of the enhancement type load transistors is set so that it is different from that of the enhancement type transistors of the peripheral circuit. For example, the threshold voltage of the enhancement type load transistors is lower than that of the enhancement type transistors of the peripheral circuit.
机译:一种半导体存储装置,包括:具有多个存储单元的非易失性存储单元阵列;具有阈值电压的增强型负载晶体管;以及包括增强型的至少一个外围电路,例如电平转换器,列解码器等。具有阈值电压的晶体管。为了提高存储单元的写入速度,将增强型负载晶体管的阈值电压设定为与外围电路的增强型晶体管的阈值电压不同。例如,增强型负载晶体管的阈值电压低于外围电路的增强型晶体管的阈值电压。

著录项

  • 公开/公告号US5319594A

    专利类型

  • 公开/公告日1994-06-07

    原文格式PDF

  • 申请/专利权人 KABUSHIKI KAISHA TOSHIBA;

    申请/专利号US19930076379

  • 发明设计人 TERUO UEMURA;YUKIO KAWASE;

    申请日1993-06-14

  • 分类号G11C11/34;

  • 国家 US

  • 入库时间 2022-08-22 04:31:40

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