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suitsuchitokiyapashita congruence secondary forma circuit
suitsuchitokiyapashita congruence secondary forma circuit
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机译:suitsuchitokiyapashita同余二次曲面
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摘要
PURPOSE:To reduce a DC offset quantity generated from a circuit itself by combining a capacity and a switching means as prescribed and forming a circuit. CONSTITUTION:Operational amplifiers 1, 2 are provided with intergral capacities C1, C2, respectively, and a (+) terminal is grounded. Also, a capacity K14 is connected between an input terminal 3 and a (-) terminal of the amplifier 1, a capacity K5 is connected between an output terminal of the amplifier 1 and a (-) terminal of the amplifier 2, and also a switch SW3, a capacity K3 and an SW4 are connected in series. Also, an SW1, a capacity K10 and an SW2 are connected in series between the terminal 3 and the (-) terminal of the amplifer 1, and an SW5, a capacity K7 and an SW6 are connected in series between the (-) terminal of the amplifier 1 and the output terminal of the amplifier 2. Moreover, a capacity K1 is connected between the SW2 and the SW3. The SW1, SW6 and SW2-SW5 are in an opposite phase relation, respectively and connected to the ground potential. By forming in this way, a DC offset quantity generated from the circuit itself is reduced.
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