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EQUIVALENT PULSE PERIOD INVALIDATION DISCRIMINATION CIRCUIT

机译:等效脉冲周期失效鉴别电路

摘要

PURPOSE: To provide an equivalent pulse period invalidation discrimination circuit capable of correctly discriminating a frequency of a horizontal synchronizing signal by a horizontal frequency discrimination circuit. ;CONSTITUTION: When the frequency of the horizontal synchronizing signal is discriminated from a composite synchronizing signal in which an equivalent pulse is inserted into a vertical blanking period at the half period of the horizontal synchronizing signal by the horizontal frequency discrimination circuit A, horizontal frequency discrimination operation by the horizontal frequency discrimination circuit A is invalidated based on an output of a horizontal frequency discrimination invalidation period generation circuit 24 in the interval when the equivalent pulse detected by an equivalent pulse period detection decoder 23 exists, and the operation is prohibited by the output of a latch pulse enable circuit 25.;COPYRIGHT: (C)1995,JPO
机译:目的:提供一种能够通过一个水平频率判别电路判别正确的水平同步信号的频率的等效脉冲周期无效鉴别电路。 ;组成:当水平同步信号的频率从在其中的等效脉冲在由水平鉴频电路A中的水平同步信号的一半周期插入到垂直消隐期间的复合同步信号判别,水平频率鉴别由水平鉴频电路A操作无效基于水平频率鉴别无效周期生成电路24中的间隔输出时的等效脉冲解码器23中存在检测出由等效脉冲周期检测,并且操作由输出禁止锁存脉冲的启用电路25; COPYRIGHT:(C)1995年,日本特许厅

著录项

  • 公开/公告号JPH07210106A

    专利类型

  • 公开/公告日1995-08-11

    原文格式PDF

  • 申请/专利权人 MATSUSHITA ELECTRIC IND CO LTD;

    申请/专利号JP19940002890

  • 发明设计人 NAKANO KIYOHIRO;

    申请日1994-01-17

  • 分类号G09G1/16;G09G1/04;H04N5/04;H04N5/46;

  • 国家 JP

  • 入库时间 2022-08-22 04:26:55

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