METHOD AND ARRANGEMENT FOR REDUCING THE NUMBER OF LOSS CYCLES IN THE PROCESSING OF COMMANDS IN DATA PROCESSING SYSTEMS WORKING ACCORDING TO THE CONSTRUCTION BELT PRINCIPLE.

摘要

A large variety of possible uses is obtained by extending the address processor for calculating addresses in the editing processor (PLU) to a processor (RW) executing predetermined instructions in advance of the execution by the execution processor (EXU): precalculation of the instruction count for determining the next instruction address in conjunction with storing the instruction lengths of the instructions being edited. Elimination of register conflicts in the case of a multiplicity of instructions by storing the results of the processor (RW) in a conflict memory (RCB) in association with the instructions being edited. Conversion of conditional into unconditional jump instructions by using the indication provided during the execution of the previous instruction. Protection of the instruction processing by comparing the results previously determined with those of the execution processor (EXU) and thus earlier error detection. IMAGE