首页> 外国专利> DOUBLING THE NUMBER OF RASTER LINES IN TELEVISION RECEIVERS AT THE FRAME RATE

DOUBLING THE NUMBER OF RASTER LINES IN TELEVISION RECEIVERS AT THE FRAME RATE

机译:以帧速率将电视接收中的光栅线数量增加一倍

摘要

This invention is a circuit for doubling the number of raster lines in television receivers without the need for change in the transmission standards. The concept relates to improved definition television (IDTV) or enhanced definition television (EDTV). With this invention the number of lines and the resolution per line can be doubled as many times as technology permits. The circuit is based on the use of two read-write memory arrays or memory buffers and an interpolation circuit. One memory array is used to store one image, while data is being read from the other memory array. The image being read from one of the arrays is interpolated through an interpolation circuit. The role of the two memory arrays changes with every incoming image, the memory array that was in the read mode is switched to the write mode and vice-versa. The interpolation is carried-out through pixel replication in two-dimensions followed by a square symmetrical two-dimensional low-pass filter, which provides interpolation based on the Sampling Theorem. This could also be followed by a two-dimensional (2-D) circularlysymmetrical high-pass filter for image enhancement. A description of a circuit realizing a 2-D infinite impulse response filter and the filter coefficients for a square symmetrical low-pass filter having near linear phase is provided. Circuits for addressing the two memory arrays are described. The incoming image is assumed to be formed of two interlaced frames. Circuit designs are provided for displaying video images through either progressive or interlaced scanning. Interpolation could also be carried-out through a onedimensional (1-D) filter, or through the Discrete Cosine transform. These other possible variations are described in the preferred embodiment.
机译:本发明是一种无需改变传输标准就能使电视接收机中的光栅线数加倍的电路。该概念涉及改进清晰度电视(IDTV)或增强清晰度电视(EDTV)。利用本发明,行数和每行的分辨率可以在技术允许的范围内翻倍。该电路基于使用两个读写存储阵列或存储缓冲区以及一个内插电路。一个存储器阵列用于存储一个图像,而数据正在从另一存储器阵列读取。从阵列之一读取的图像通过插值电路被插值。两个内存阵列的角色随每个传入映像而变化,处于读取模式的内存阵列将切换到写入模式,反之亦然。内插是通过二维像素复制,然后是方形对称的二维低通滤波器执行的,该滤波器根据采样定理提供内插。紧随其后的是用于图像增强的二维(2-D)圆对称高通滤波器。提供了实现二维无限脉冲响应滤波器的电路和具有近似线性相位的方形对称低通滤波器的滤波器系数的描述。描述了用于寻址两个存储器阵列的电路。假定输入图像由两个隔行帧组成。提供了用于通过逐行扫描或隔行扫描来显示视频图像的电路设计。插值也可以通过一维(1-D)滤波器或离散余弦变换来执行。在优选实施例中描述了这些其他可能的变化。

著录项

  • 公开/公告号CA2104645A1

    专利类型

  • 公开/公告日1995-02-24

    原文格式PDF

  • 申请/专利权人 SID-AHMED MAHER A.;

    申请/专利号CA19932104645

  • 发明设计人 SID-AHMED MAHER A.;

    申请日1993-08-23

  • 分类号H04N7/01;

  • 国家 CA

  • 入库时间 2022-08-22 04:16:18

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